Referral Drive @ Malaysia Location.
Permanent: IC Layout & Design Engineer
- Layout of integrated circuits in Cadence Virtuoso analog Intel tools like GenA
- Work according to project planning, provide feedback concerning layout planning to the project leader and organize own work
Skills:
- Minimum Experience with fibfet tech 3+ years in analog ,digital ,memory layout and design
- Tools:Intel GenA or anything ,must have 22nm to 7nm experience .
- Digital Layout/backend background
- Experience in working with Synposis
- RTL Design knowledge
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